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Innovative Silicon
Senior Design Automation Engineer

Description:

The Senior Design Automation Engineer will automate the verification and characterization flow of memory design. He/she will be responsible for the development of a memory macro verification flow, which includes Physical Verification (DRC, LVS, extraction of parasitic components and Post-Layout Simulations, using state-of-the-art Design Tools. Integrated in a 3-5 engineers team, he/she will collaborate with Design Engineers, Layout Designers and Memory Architects. Typical Duties • Understand memory macro and test vehicle characteristics • Propose and implement a verification and characterization flow • Document results • Assist Design team to verify design

Qualifications:

Requirements • BsEE, Physics, or equivalent • Minimum 3 years of experience in design and minimum 3 years of experience in EDA tool support • Familiar with Spice and fast-Spice simulators • Calibre DRC, LVS deck coding, experience with Parasitics extraction. • Coding in Verilog, C, tcl/tk, Unix shell, Perl • Works independently • Self motivated, results oriented, team oriented and good communication skills • Fluent in English Nice to have • MsEE • Experience in verification of memory macro at 90 nm and below • Willing to travel once per semester to Swiss office or to customer sites in Asia or Europe

Location of Position:

Santa Clara, California

Status:

Full-time

Required Education:

Graduate degree

Required Experience:

5+ years

Management:

Not specified

Travel Requirement:

25%-50%

Salary Range:

Not specified

Referral Code:

59013

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